The invention generally relates to an optical display device, and more particularly, the invention relates to a display panel, such as an active matrix liquid crystal display (LCD) panel, for example.
Referring to FIG. 1, a typical portable computer system 30 (a laptop or hand-held computer system, as examples) may include a liquid crystal display (LCD) panel 36 to generate images for the computer system 30. In this manner, a processor 32 (a central processing unit (CPU), for example) may store image data (in a system memory 34) that indicates intensity values for an image to be displayed on the LCD panel 36. The image data may be temporarily stored in a frame buffer 31.
Referring to FIG. 2, as an example, the display panel 36 may be an active matrix liquid crystal display (LCD) panel that includes an array 6 of pixel cells 25 (arranged in rows and columns) that form corresponding pixels of an image. To accomplish this, each pixel cell 25 typically receives an electrical voltage that controls optical properties of the cell 25 and thus, controls the perceived intensity of the corresponding pixel. If the cell 25 is a reflective pixel cell, the level of the voltage controls the amount of light that is reflected by the cell 25, and if the cell 25 is a transmissive pixel cell, the level of the voltage controls the amount of light that is transmitted by the cell 25.
Updates are continually made to the voltages of the pixel cells 25 to refresh or update the displayed image. More particularly, each pixel cell 25 may be part of a different display element 20 (a display element 20a, for example), a circuit that stores a charge that indicates the voltage for the pixel cell. The charges that are stored by the display elements 20 typically are updated (via row 4 and column 3 decoders) in a procedure called a raster scan. The raster scan is sequential in nature, a designation that implies the display elements 20 are updated in a particular order such as from left-to-right or from right-to-left.
As an example, a particular raster scan may include a left-to-right and top-to-bottom xe2x80x9czig-zagxe2x80x9d scan of the array 8. More particularly, the display elements 20 may be updated one at a time, beginning with the display element 20a that is located closest to the upper left corner of the array 6 (assuming the display panel 1 is standing upright). During the raster scan, the display elements 20 are individually and sequentially selected (for charge storage) in a left-to-right direction across each row, and the updated charge is stored in each display element 20 when the display element 20 is selected. After each row is scanned, the raster scan advances to the leftmost display element 20 in the next row immediately below the previously scanned row.
During the raster scan, the selection of a particular display element 20 may include activating a particular row line 14 and a particular column line 16, as the rows of the display elements 20 are associated with row lines 14 (row line 14a, as an example), and the columns of the display elements 20 are associated with column lines 16 (column line 16a, as an example). Thus, each selected row line 14 and column line 16 pair uniquely addresses, or selects, a display element 20 for purposes of transferring a charge (in the form of a voltage) from a video signal input line 12 to a capacitor 24 (that stores the charge) of the selected display element 20.
As an example, for the display element 20a that is located at pixel position (0, 0) (in cartesian coordinates), a voltage may be applied to the video signal input line 12 (at the appropriate time) that indicates a new charge that is to be stored in the display element 20a. To transfer this voltage to the display element 20a, the row decoder 4 may assert (drive high, for example) a row select signal (called ROW0) on a row line 14a that is associated with the display element 20a, and the column decoder 3 may assert a column select signal (called COL0) on column line 16a that is also associated with the display element 20a. In this manner, the assertion of the ROW0 signal may cause a transistor 22 (of the display element 20a) to couple a capacitor 24 (of the display element 20a) to the column line 16a. The assertion of the COL0 signal may cause a transistor 18 to couple the video signal input line 12 to the column line 16a. As a result of these connections, the charge that is indicated by the voltage of the video signal input line 12 is transferred to the capacitor 24 of the display element 20a. The other display elements 20 may be selected for charge updates in a similar manner.
FIG. 3 illustrates the optical response of the pixel cell 25 to its terminal voltage for the case where the pixel cell is a twisted nematic, transmissive pixel cell and backlighting is used. As shown, when the voltage surpasses a range 37 of voltages, the pixel cell 25 permits the maximum amount (fifty percent, for example) of light to pass through the cell 25, a state in which the pixel cell 25 is fully turned on (i.e., the intensity of the light that is emitted by the pixel cell 25 is maximized). Likewise, when the voltage is between zero volts and the range 37, the pixel cell 25 substantially blocks the light from passing through and is placed in a fully turned off state. The transmission characteristics of the pixel cell 25 may be symmetrical, i.e., the same effects may be produced if the polarity of the terminal voltage is reversed, as depicted in FIG. 3.
For the range 37 of voltages, the pixel cell 25 is neither turned on or off, but rather, the pixel cell exhibits different intensities between the fully turned on intensity and the fully turned off intensity. Typically, the voltage of the pixel cell 25 remains within the range 37 to cause a desired shade of gray (for a black and white display panel) or a desired shade of color (for a color display panel in which the pixel cell 25 is covered by a color filter). As an example, quite often the voltages in the range 37 are associated with a range of discrete pixel intensities from 0 to 255, called grayscale values. Therefore, the intensity of the pixel cell 25 may have a dynamic range, of two hundred fifty-six different discrete intensity levels. Unfortunately, a large number (eight, for example) of bits may be used to communicate each intensity value from the frame buffer 31 to the display panel 36. As a result, the bandwidth of communication between the display panel and the rest of the computer system 30 may be limited.
Thus, there is a continuing need for an arrangement that addresses one or more of the above-stated problems.
In one embodiment of the invention, a method includes storing an analog indication of a terminal voltage of a pixel cell. A second indication of an incremental update to the terminal voltage is received, and the analog indication is used to modify the terminal voltage to reflect the incremental update.
In another embodiment, a method includes storing analog indications of terminal voltages of pixel cells and using the analog indications to refresh the terminal voltages.